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NCP5890
Inductor Peak Current
This safety feature is clamping the maximum current
allowed in the inductor according to external R PCA resistor,
which is connected between IPK input and the ground.
The maximum I PK current is given by the internal current
mirror ratio (multiplier ? kk ? ) typically equal to 9700. In
other words, to get a 855 mA maximum peak current in the
inductor, the reference current should be 850 mA/9700 =
87.6 m A. This current is used to calculate the resistor
connected between the I PK pin and GND: R REF = 1.144 /
87.6e ? 6 = 13 k W .
The concept depicted in the ILED current paragraph
applies as well and care must be observed to avoid any
voltage source connection to the IPK pin.
Gradual Dimming
The purpose of this function is to gradually Increase or
Decrease the brightness of the backlight / keyboard LED
upon command from the external MCU. The function is
activated and controlled by means of the I 2 C protocol.
The period (either upward or downward) is equal to the
time defined for each step, multiplied by the number of
steps. The number of step is derived from the value
associated with the target current.
To operate such a function, the MCU will provide two
information:
1. The target current level (either upward or
downward)
2. The time per step
When a new gradual dimming sequence is requested, the
output current changes, according to the exponential curve,
from the existing start value to the end value. The end
current value is defined by the contents of the Upward
(GDIM ? UP) or Downward (GDIM ? DWN) register, the
width of each step is defined by the TDIM register, the
number of steps being in the 1 to 32 range ($00 to $1F). In
the event of a software error, the system checks that neither
the maximum output current (25 mA), nor the zero level
are forced out of their respective bounds. Similarly,
software errors shall not force NCP5890 into an
uncontrolled mode of operation.
The dimming is built with 32 steps and the time delay
encoded into DATA register which is the third byte upload
by I 2 C transmission.
When the gradual dimming is not requested (register
selection = $01), the output current is set up to the level
defined by the contents of the related register upon
acknowledge of the output current byte.
The gradual dimming sequence must be set up before a
new output current data byte is sent to the NCP5890. At this
point, the brightness sequence takes place when the new
data byte is acknowledged by the internal I 2 C decoder.
Since the six registers are loaded on independent byte flow
associated to the I 2 C address, any parameter of the
NCP5890 chip can be updated ahead of the next function.
$02 GDIM ? UP[4..0] and $03 GDIM ? DWN[4..0] Gradual Dimming Target
B7
B6
B5
B4
B3
B2
B1
B0
ms
RESET
?
0
?
0
?
0
ILED5
0
ILED4
0
ILED3
0
ILED2
0
ILED1
0
Bits [B7:B5] : RFU
Bits [B4:B0] : ILED peak current setup or Gradual Dimming Timing
The number of steps for a given sequence, depends upon
the start and end output current range: since the IPEAK
value is encoded in the ILEDREG [4:0] binary scale, a
maximum of 31 steps is achievable during a gradual
dimming operation.
To select the direction of the gradual dimming (either
Upward or Downward), one shall set ? up the appropriate
register before to activate the sequence as depicted in the
example here below:
? First Byte = 0111 0000 3 I2C address
(assuming I2CADR = Low)
$04 TDIM[4..0] Gradual Dimming Time per Step
? Second byte = 0000 0010 3 select an ILED target
UPWARD sequence
? Third byte = 0000 1111 3 set I ? LED =
2.51% of the maximum range
? First Byte = 0111 0000 3 I2C address
(assuming I2CADR = Low)
? Second byte = 0000 0100 3 set Timing and start the
sequence
? Third byte = 0000 0010 3 set Timing per step =
20 ms/step
B7
B6
B5
B4
B3
B2
B1
B0
ms
RESET
0
0
0
0
0
0
200
0
100
0
50
0
25
0
12.5
0
Bits [B7:B5] : RFU
Bits [B4:B0] : Gradual Dimming Timing
NOTE:
bit B0 = 2^14/F, with F = operating frequency (1.3 MHz typical)
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